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vishay siliconix dg604 document number: 69934 s11-1429-rev. c, 18-jul-11 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 1.0 pc charge injection, 100 pa leakage, 4-channel multiplexer description the dg604 is an analog 4-channel cmos, multiplexer, designed to operate from a + 2.7 v to + 12 v single supply or from 2.7 v to 5 v, dual supplies. the dg604 is fully specified at + 3 v, + 5 v and 5 v. all control logic inputs have guaranteed 2 v logic high limits when operating from + 5 v or 5 v supplies and 1.4 v when operating from a 3 v supply. the dg604 switches conduct equally well in both directions and offer rail to rail analog signal handling. < 1 pc low charge injection, coupled with very low switch capacitance and leakage current makes this product ideal for use in precision instrumentation applications. o perating temperature range is specified from - 40 c to + 1 25 c. the dg604 is available in 14 lead tssop and the space saving 1.8 mm x 2.6 mm miniqfn package. features ? halogen-free according to iec 61249-2-21 definition ? ultra low charge injection ( 1 pc, typ. over the full analog signal range) ? leakage current < 0.5 na max. at 85 c (for dg604eq-t1-e3) ? low switch capacitance (c soff , 3 pf typ.) ?low r ds(on) - 115 ? max. ? fully specified with single s upply operation at 3 v, 5 v and dual supplies at 5 v ? low voltage, 2.5 v cmos/ttl compatible ? 400 mhz, - 3 db bandwidth ? excellent isolation and crosstalk performance (typ. > - 60 db at 10 mhz) ? fully specified from - 40 c to 85 c and - 40 c to + 125 c ? 14 pin tssop and 16 pin miniqfn package (1.8 mm x 2.6 mm) ? compliant to rohs directive 2002/95/ec applications ? high-end data acquisition ? medical instruments ? precision instruments ? high speed communications applications ? automated test equipment ? sample and hold applications functional block diagram and pin configuration pin 1 de v ice marking: txx for dg604 (miniqf n 16) xx = date/lot tracea b ility code txx s2 v - s1 v + s4 s3 1 2 3 4 9 10 11 12 5 8 7 6 13 14 n c 16 d a1 n c a0 e n able n c g n d n c top v ie w dg604 mqfn-16 logic 15 n c s3 n c s4 9 10 11 12 g n d n c v + a1 8 14 13 v - s1 s2 n c a0 e n able d 3 4 5 6 1 2 7 top v ie w dg604 tssop14 6 logic
www.vishay.com 2 document number: 69934 s11-1429-rev. c, 18-jul-11 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. - 40 c to 85 c datasheet limits apply. notes: a. signals on sx, dx, or inx exceeding v+ or v- will be clamped by internal diodes. limit forward diode current to maximum curre nt ratings. b. all leads welded or soldered to pc board. c. derate 5.6 mw/c above 70 c. d. derate 6.6 mw/c above 70 c. e. manual soldering with iron is not recommended for leadless co mponents. the miniqfn-16 is a leadless package. the end of the l ead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. a solder fillet at the exposed copper l ip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. truth table enable input selected input on switches a1 a0 dg604 l x x all switches open hll d to s1 hlh d to s2 hhl d to s3 hhh d to s4 ordering information temp. range package part number - 40 c to 125 c a 14 pin tssop dg604eq-t1-e3 16 pin miniqfn dg604en-t1-e4 absolute maximum ratings t a = 25 c, unless otherwise noted parameter limit unit v+ to v- 14 v gnd to v- 7 digital inputs a , v s , v d (v-) - 0.3 to (v+) + 0.3 or 30 ma, whichever occurs first continuous current (any terminal) 30 ma peak current, s or d (pulsed 1 ms, 10 % duty cycle) 100 storage temperature - 65 to 150 c power dissipation (package) b 14 pin tssop c 450 mw 16 pin miniqfn d, e 525 thermal resistance (package) b 14 pin tssop 178 c/w 16 pin miniqfn 152 specifications for dual supplies parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = - 5 v v in a0, a1 and enable = 2 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - 55- 55v on-resistance r ds(on) i s = 1 ma, v d = - 3 v, 0 v, + 3 v room full 70 115 160 115 140 ? on-resistance match ? r on i s = 1 ma, v d = 3 v room full 15 6.5 5 6.5 on-resistance flatness r flatness i s = 1 ma, v d = - 3 v, 0 v, + 3 v room full 10 20 33 20 22
document number: 69934 s11-1429-rev. c, 18-jul-11 www.vishay.com 3 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications for dual supplies parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = - 5 v v in a0, a1 and enable = 2 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch switch off leakage current (for 14 pin tssop) i s(off) v+ = 5.5 v, v- = - 5.5 v v d = 4.5 v, v s = 4.5 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 na i d(off) room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 channel on leakage current (for 14 pin tssop) i d(on) v+ = 5.5 v, v- = - 5.5 v, v s = v d = 4.5 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 switch off leakage current (for 16 pin miniqfn) i s(off) v+ = 5.5 v, v- = - 5.5 v v d = 4.5 v, v s = 4.5 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 i d(off) room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 channel on leakage current (for 16 pin miniqfn) i d(on) v+ = 5.5 v, v- = - 5.5 v, v s = v d = 4.5 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 digital control input current, v in low i il v in a0, a1 and enable under test = 0.8 v full 0.005 - 0.1 0.1 - 0.1 0.1 a input current, v in high i ih v in a0, a1 and enable under test = 2 v full 0.005 - 0.1 0.1 - 0.1 0.1 input capacitance e c in f = 1 mhz room 3.4 pf dynamic characteristics transition time t trans v s(close) = 3 v, v s(open) = 0 v, r l = 300 ? , c l = 35 pf room full 20 70 105 70 80 ns tu r n - o n t i m e t on r l = 300 ? , c l = 35 pf v s = 3 v room full 16 60 90 60 65 turn-off time t off room full 15 52 76 52 56 break-before-make time delay t d v s = 3 v r l = 300 ? , c l = 35 pf room full 15 10 10 charge injection e q v g = 0 v, r g = 0 ? , c l = 1 nf room 0.7 pc off isolation e oirr r l = 50 ? , c l = 5 pf, f = 10 mhz room - 72 db bandwidth e bw r l = 50 ? room 400 mhz channel-to-channel crosstalk e x ta l k r l = 50 ? , c l = 5 pf, f = 10 mhz room - 81 db source off capacitance e c s(off) f = 1 mhz room 2.7 pf drain off capacitance e c d(off) room 7.3 channel on capacitance e c d(on) room 13.8 total harmonic distortion e thd signal = 1 v rms , 20 hz to 20 khz, r l = 600 ? room 0.01 % power supplies power supply current i+ v in = 0 v, or v+ room full 0.001 0.5 1 0.5 1 a negative supply current i- room full - 0.001 - 0.5 - 1 - 0.5 - 1 ground current i gnd room full - 0.001 - 0.5 - 1 - 0.5 - 1
www.vishay.com 4 document number: 69934 s11-1429-rev. c, 18-jul-11 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications for single supply parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = 0 v v in a0, a1 and enable = 2 v, 0.8 v a temp. b typ. c - 40 c to 125 c - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 5 5 v on-resistance r ds(on) i s = 1 ma, v d = + 3.5 v room full 120 170 250 170 200 ? on-resistance match ? r on i s = 1 ma, v d = + 3.5 v room full 35 12 5 10 switch off leakage current (for 14 pin tssop) i s(off) v+ = 5.5 v, v- = 0 v v d = 1 v/4.5 v, v s = 4.5 v/1 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 na i d(off) room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 channel on leakage current (for 14 pin tssop) i d(on) v+ = 5.5 v, v- = 0 v v s = v d = 1 v/4.5 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 switch off leakage current (for 16 pin miniqfn) i s(off) v+ = 5.5 v, v- = - 5.5 v v d = 1 v/4.5 v, v s = 4.5 v/1 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 i d(off) room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 channel on leakage current (for 16 pin miniqfn) i d(on) v+ = 5.5 v, v- = 0 v, v s = v d = 1 v/4.5 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 digital control input current, v in low i l v in a0, a1 and enable under test = 0.8 v full 0.005 - 0.1 0.1 - 0.1 0.1 a input current, v in high i h v in a0, a1 and enable under test = 2 v full 0.005 - 0.1 0.1 - 0.1 0.1 input capacitance c in f = 1 mhz room 4.3 pf dynamic characteristics transition time t trans v s(close) = 3 v, v s(open) = 0 v, r l = 300 ? , c l = 35 pf room full 36 75 120 75 95 ns enable turn-on time t on(en) room full 30 70 102 70 80 enable turn-off time t off(en) room full 17 47 88 47 63 break-before-make-time t bmm room full 23 55 charge injection q c l = 1 nf, r gen = 0 ? , v gen = 0 v full 0.15 pc off-isolation e oirr f = 10 mhz, r l = 50 ? , c l = 5 pf room - 58 db crosstalk e x ta l k room - 81 bandwidth e bw r l = 50 ? room 330 mhz total harmonic distortion thd signal = 1 v rms, 20 hz to 20 khz, r l = 600 ? room 0.009 % source off capacitance e c s(off) f = 1 mhz room 3.1 pf drain off capacitance e c d(off) 11.6 channel on capacitance e c d(on) 16.2 power supplies power supply current i+ v in = 0 v, or v+ room full 0.001 0.5 1 0.5 1 a negative supply current i- room full - 0.001 - 0.5 - 1 - 0.5 - 1 ground current i gnd room full - 0.001 - 0.5 - 1 - 0.5 - 1
document number: 69934 s11-1429-rev. c, 18-jul-11 www.vishay.com 5 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications for single supply parameter symbol test conditions unless otherwise specified v+ = 3 v, v- = 0 v v in a0, a1 and enable = 1.4 v, 0.6 v a temp. b typ. c - 40 c to + 125 c - 40 c to + 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 3 3 v on-resistance r ds(on) i s = 1 ma, v d = + 1.5 v room full 200 245 325 245 290 ? on-resistance match ? r on i s = 1 ma, v d = + 1.5 v room full 56 13 11 6 switch off leakage current (for 14 pin tssop) i s(off) v+ = 3 v, v- = 0 v v d = 1 v/3 v, v s = 3 v/1 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 na i d(off) room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 channel on leakage current (for 14 pin tssop) i d(on) v+ = 3 v, v- = 0 v v s = v d = 1 v/3 v room full 0.01 - 0.1 - 18 0.1 18 - 0.1 - 0.5 0.1 0.5 switch off leakage current (for 16 pin miniqfn) i s(off) v+ = 3.3 v, v- = 0 v v d = 1 v/3 v, v s = 3 v/1 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 i d(off) room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 channel on leakage current (for 16 pin miniqfn) i d(on) v+ = 3.3 v, v- = 0 v v d = 1 v/3 v, v s = 3 v/1 v room full 0.01 - 1 - 18 1 18 - 1 - 2 1 2 digital control input current, v in low i l v in a0, a1 and enable under test = 0.6 v full 0.005 - 1 1 - 1 1 a input current, v in high i h v in a0, a1 and enable under test = 1.4 v full 0.005 - 1 1 - 1 1 input capacitance c in f = 1 mhz room 4.3 pf dynamic characteristics transition time t trans v s(close) = 3 v, v s(open) = 0 v, r l = 300 ? , c l = 35 pf room full 95 130 190 130 160 ns enable turn-on time t on(en) room full 77 108 161 108 131 enable turn-off time t off(en) room full 35 76 112 76 88 break-before-make-time t bmm room full 45 55 charge injection q c l = 1 nf, r gen = 0 ? , v gen = 0 v full 0.1 pc off-isolation e oirr f = 10 mhz, r l = 50 ? , c l = 5 pf room - 58 db crosstalk e x ta l k room - 90 bandwidth e bw r l = 50 ? room 290 mhz total harmonic distortion thd signal = 1 v rms, 20 hz to 20 khz, r l = 600 ? room 0.09 % source off capacitance e c s(off) f = 1 mhz room 3.1 pf drain off capacitance e c d(off) 11.7 channel on capacitance e c d(on) 16.5 power supplies power supply current i+ v in = 0 v, or v+ room full 0.001 0.5 1 0.5 1 a negative supply current i- room full - 0.001 - 0.5 - 1 - 0.5 - 1 ground current i gnd room full - 0.001 - 0.5 - 1 - 0.5 - 1
www.vishay.com 6 document number: 69934 s11-1429-rev. c, 18-jul-11 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) on-resistance vs. v d (single supply voltage) on-resistance vs. analog voltage and temperature on-resistance vs. analog voltage and temperature 0 50 100 150 200 250 300 350 02468101214 v d - analog voltage (v) r on - on-resistance ( ? ) t = 25 c i s = 1 ma v cc = 2.7 v v cc = 3.0 v v cc = 5.0 v v cc = 13.2 v v d - analog voltage (v) r on - on-resistance ( ? ) 0 50 100 150 200 250 300 350 400 450 500 0 0.5 1 1.5 2 2.5 3 + 125 c + 85 c + 25 c - 40 c v+ = 3.0 v, v- = 0 v i s = 1 ma v d - analog voltage (v) r on - on-resistance ( ? ) 0 25 50 75 100 125 150 175 200 225 250 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 v+ = 5.0 v, v- = - 5.0 v i s = 1 ma + 125 c + 85 c + 25 c - 40 c on-resistance vs. v d (dual supply voltage) on-resistance vs. analog voltage and temperature supply current vs. input switching frequency v d - analog voltage (v) r on - on-resistance ( ? ) 0 20 40 60 80 100 120 140 160 - 8 - 6 - 4 - 2 0 2 4 6 8 v+ = + 2.7 v v- = - 2.7 v v+ = + 5.0 v v- = - 5.0 v v+ = + 6.2 v v- = - 6.2 v t = 25 c i s = 1 ma v d - analog voltage (v) r on - on-resistance ( ? ) 0 50 100 150 200 250 300 350 400 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 v+ = 5.0 v, v- = 0 v i s = 1 ma + 125 c + 85 c + 25 c - 40 c input switching frequency (hz) supply current (a) v+ = + 5.0 v v- = - 5.0 v 10 10m 100k 10k 1k 100 1m 1 pa 10 pa 100 pa 1 na 100 na 1 a 10 a 100 a 1 ma 10 ma i+ i- i gnd
document number: 69934 s11-1429-rev. c, 18-jul-11 www.vishay.com 7 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) leakage current vs. temperature insertion loss, off-isolation, crosstalk vs. frequency total harmonic distortion vs. frequency temperature (c) leakage current (pa) 1 10 100 1000 10 000 100 000 - 60 - 40 - 20 0 20 40 60 80 100 120 140 i d(off) i d(on) i s(off) v+ = + 5.0 v v- = - 5.0 v frequency (hz) l oss , o irr , x talk (db) 100k 1m 10m 100m 1g - 100 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 10 oirr loss x talk v+ = 5.0 v r l = 50 ? frequency (hz) thd (%) 0.001 0.01 0.1 1 10 100 10 100 1000 10 000 100 000 v+ = + 3.0 v v- = 0.0 v v+ = + 5.0 v v- = - 5.0 v v+ = + 5.0 v v- = 0.0 v leakage current vs. temperature charge injection vs. analog voltage switching threshold vs. supply voltage temperature (c) leakage current (pa) 1 10 100 1000 10 000 - 60 - 40 - 20 0 20 40 60 80 100 120 140 v+ = 13.2 v v- = 0 v i d(off) i d(on) i s(off) v s - analog voltage (v) q - charge injection (pc) - 0.8 - 0.6 - 0.4 - 0.2 0.2 0.4 0.6 0.8 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 v+ = + 3.0 v v- = 0 v v+ = + 5.0 v v- = - 5.0 v v+ = + 5.0 v v- = 0 v t = 25 c c l = 1 nf - 0.7 - 0.5 - 0.3 - 0.1 0.1 0.3 0.5 0.7 0 v+ - supply voltage (v) v t - switching threshold (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 02468101214
www.vishay.com 8 document number: 69934 s11-1429-rev. c, 18-jul-11 vishay siliconix dg604 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits figure 1. transition time a0 a1 e n able g n d v + v - v - v + v o 50 300 35 pf d s1 s4 v s1 v s2 0 v v cc 50 % 50 % 90 % t tra n s v o v a0, a1 v s1 or v s2 v + s2 s3 90 % t tra n s t r < 5 ns t f < 5 ns figure 2. enable switching time a0 a1 e n able g n d v + v - v - v + v o 50 300 35 pf d s1 s3 0 v v cc 50 % 50 % 90 % t o n s1 o n v o v enable v s1 t r < 5 ns t f < 5 ns v s1 0 v s2 s4 t off 90 % figure 3. break-before-make a0 a1 e n able g n d v + v - v - v o 50 300 35 pf d s1 0 v v cc 50 % 90 % t bbm v o v a0, a1 v s v s v + 0 v v + s2 s3 s4 t r < 5 ns t f < 5 ns
document number: 69934 s11-1429-rev. c, 18-jul-11 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 vishay siliconix dg604 test circuits vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?69934 . figure 4. charge injection a0 a1 e n able g n d v + v - v - v + v o c l 1 nf d sx 0 v v cc v o v enable r g channel select v g o n off charge i n jectio n = v o x c l t r < 5 ns t f < 5 ns v o figure 5. insertion loss figure 7. crosstalk a0 a1 e n able g n d v + v - v - v + v out d s1 v g r g = 50 50 v i n n et w ork analyzer insertion loss = 20 log v out v i n v + a0 a1 e n able g n d v v - v - v v out d s4 v g r g = 50 50 n et w ork analyzer crosstalk = 20 log v out v i n 50 s1 v + v i n figure 6. off-isolation figure 8. source/drain capacitance a0 a1 e n able g n d v + v - v - v + v out d s4 v g r g = 50 50 v i n n et w ork analyzer off isolation = 20 log v out v i n a0 a1 e n able g n d v + v - v + d s1 | to | s4 impedance analyzer channel select v - v +
document number: 69938 www.vishay.com revision: 14-jan-08 1 package information vishay siliconix 14l tssop pin 1 id mark 1 2 3 l1 detail ?a? seating plane ga u ge plane 0.25 l r r1 seating plane detail ?a? d 14 e e1 c l c l b b b 1 c c1 a1 a2 a b b detail ?b to b? 3 4 5 6 1 n otes: 1. all dimensions are in millimeters (angles in degrees) 2. dimensioning and tolerancing per a n si y14.5m-19 8 2 3 dimension ?d? does not incl u de mold flash, protr u sions or gate bu rrs 4 dimension ?e1? does not incl u de internal flash or protr u sion 5 dimension ? b ? does not incl u de dam b ar protr u sion 6 cross section b to b to b e determined at 0.10 mm to 0.25 mm from the lead tip e symbol minimum nominal maximum a- -1.20 a1 0.05 - 0.15 a2 0.80 0.90 1.05 d 4.9 5.0 5.1 e1 4.3 4.4 4.5 e 6.2 6.4 6.6 l 0.45 0.60 0.75 r0.09 - - r1 0.09 - - b 0.19 - 0.30 b1 0.19 0.22 0.25 c 0.09 - 0.20 c1 0.09 - 0.16 10 - 8 l1 1.0 ref. e 0.65 bsc ecn: t-07766-rev. a, 14-jan-08 dwg: 5962
vishay siliconix package information document number: 74323 14-aug-06 www.vishay.com 1 mini qfn-16l dim millimeters inches min. nam max. min. nam max. a 0.70 0.75 0.80 0.0275 0.0295 0.0315 a1 0 - 0.05 0 - 0.002 b 0.15 0.20 0.25 0.0059 0.0078 0.0098 c 0.15 0.20 0.25 0.0059 0.0078 0.0098 d 2.60 bsc 0.1023 bsc e 1.80 bsc 0.0708 bsc e 0.40 bsc 0.0157 bsc l 0.35 0.40 0.45 0.0137 0.0157 0.0177 l1 0.45 0.50 0.55 0.0177 0.0196 0.0216 ecn t-06380-rev. a, 14-aug-06 dwg: 5954 back side v ie w d e (2) (1) (16) (15) (14) (13) a c b e l a1 (4) (3) (5) (6) (7) ( 8 ) (9) (12) (11) (10) (10) (9) (12) (11) (3) (2) (1) (4) (16) (15) (14) (13) (5) (6) (7) ( 8 ) l1
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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